Title :
Impact of FinFET and III–V/Ge Technology on Logic and Memory Cell Behavior
Author :
Amat, Esteve ; Calomarde, Antonio ; Almudever, C.G. ; Aymerich, N. ; Canal, Ramon ; Rubio, Albert
Author_Institution :
Polytech. Univ. of Catalonia (UPC), Barcelona, Spain
Abstract :
In this paper, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFETs, and III-V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robustness against variability and soft error environments.
Keywords :
CMOS logic circuits; CMOS memory circuits; DRAM chips; MOSFET; MOSFET circuits; integrated circuit reliability; oscillators; radiation hardening (electronics); DRAM cell; FinFET technology; III-V MOSFET technology; circuit reliability; logic cell behavior; memory cell behavior; planar CMOS; process variability; ring oscillator; soft error; CMOS integrated circuits; FinFETs; Logic circuits; Market research; Performance evaluation; Power demand; DRAM; III–V semiconductor materials; integrated circuit reliability; ring oscillators;
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
DOI :
10.1109/TDMR.2013.2291410
