• DocumentCode
    1765419
  • Title

    Design of frequency-interleaved ADC with mismatch compensation

  • Author

    Qiu, Lei ; Zheng, Y.J. ; Siek, Liter

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    50
  • Issue
    9
  • fYear
    2014
  • fDate
    April 24 2014
  • Firstpage
    659
  • Lastpage
    661
  • Abstract
    A frequency-interleaving-based multichannel analogue-to-digitial converter (ADC) with mismatch compensation is presented, which is immune from the time skew problem that exist in the time-interleaved ADC. The channel mismatches, such as bandwidth mismatch, gain mismatch, offset mismatch and filter bank mismatch, are addressed and modelled in the reconstruction optimisation. A prototype of a four-channel 1 GS/s 12 bit frequency-interleaved ADC (FI-ADC) is designed to demonstrate the mismatch compensation. Simulation results show that the mismatches in the FI-ADC can be compensated effectively.
  • Keywords
    analogue-digital conversion; compensation; FI-ADC; TI-ADC; bandwidth mismatch; channel mismatches; filter bank mismatch; frequency-interleaved multichannel ADC design; gain mismatch; mismatch compensation; offset mismatch; reconstruction optimisation; time skew problem; time-interleaved ADC; word length 12 bit;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2014.0577
  • Filename
    6809281