DocumentCode :
1765427
Title :
High swing PLL charge pump with current mismatch reduction
Author :
Joram, Niko ; Wolf, Robert ; Ellinger, F.
Author_Institution :
Circuit Design & Network Theor., Tech. Univ. Dresden, Dresden, Germany
Volume :
50
Issue :
9
fYear :
2014
fDate :
April 24 2014
Firstpage :
661
Lastpage :
663
Abstract :
A compensated charge pump for use in phase-locked loops (PLLs) is presented, which reaches several of the desired design goals for this type of circuit. The measured mismatch between the source and sink currents is below 2.1% for a large output voltage headroom of 83.3% of the supply, while still having a high output resistance of 140 kΩ. This behaviour is reached with a novel dual compensation method. The circuit was implemented in a 180 nm CMOS technology using a 3 V supply.
Keywords :
CMOS analogue integrated circuits; charge pump circuits; phase locked loops; CMOS technology; current mismatch reduction; dual compensation method; high swing PLL charge pump; phase-locked loops; resistance 140 kohm; sink currents; size 180 nm; source currents; voltage 3 V;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2014.0804
Filename :
6809282
Link To Document :
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