• DocumentCode
    1765646
  • Title

    High-Frequency High Power Density 3-D Integrated Gallium-Nitride-Based Point of Load Module Design

  • Author

    Shu Ji ; Reusch, David ; Lee, Fred C.

  • Author_Institution
    Center for Power Electron. Syst., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
  • Volume
    28
  • Issue
    9
  • fYear
    2013
  • fDate
    Sept. 2013
  • Firstpage
    4216
  • Lastpage
    4226
  • Abstract
    The demand for the future power supplies that can achieve higher output currents, smaller sizes, and higher efficiencies cannot be satisfied with the conventional technologies. There are limitations in the switch performance, packaging parasitics, layout parasitics, and thermal management that must be addressed to push for higher frequencies and improved power density. To address these limitations, the utilization of Gallium-Nitride (GaN) transistors, 3-D integrated technique, low-profile magnetic substrates, and ceramic substrates with high thermal conductivity are considered. This paper discusses the characteristics of GaN transistors, including the fundamental differences between the enhancement mode and the depletion mode GaN transistors, gate driving, and the deadtime loss, the effect of parasitics on the performance of high-frequency GaN point-of-load (POLs), the 3-D copackage technique to integrate the active layer with low profile low temperature cofired ceramic magnetic substrate, and the thermal design of a high -density module using advanced substrates. The final demonstrators are three 12-1.2-V conversion POL modules: a single-phase 20 A 900 W/in3 2-MHz converter using enhancement mode GaN transistors, a single-phase10-A 800 W/in3 5-MHz converter, and a two-phase 20-A 1100 W/in3 5-MHz converter using the depletion mode GaN transistors. These converters offer unmatched power density compared to state-of-the-art industry products and research.
  • Keywords
    III-V semiconductors; field effect transistors; gallium compounds; power convertors; power supply circuits; thermal conductivity; thermal management (packaging); three-dimensional integrated circuits; wide band gap semiconductors; 3D copackage technique; GaN; ceramic substrates; current 10 A; current 20 A; deadtime loss; depletion mode; enhancement mode; frequency 2 MHz; frequency 5 MHz; high frequency 3D integrated circuits; layout parasitics; low temperature cofired ceramic magnetic substrate; packaging parasitics; point of load converters; power density; power supplies; switch performance; thermal design; thermal management; voltage 1.2 V to 12 V; Gallium nitride; Inductance; Logic gates; Silicon; Switching loss; Threshold voltage; Transistors; 3-D integration; GaN transistors; parasitics; point-of-load (POL) converter; thermal management;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8993
  • Type

    jour

  • DOI
    10.1109/TPEL.2012.2235859
  • Filename
    6392293