Bit-Error Resilient Index Assignment for Multiple Description Scalar Quantizers

This paper addresses the problem of increasing the robustness to bit errors for two description scalar quantizers. Our approach is to start with an m-diagonal index assignment and further apply a permutation to the indexes of each description to increase the minimum Hamming distance d_min of the set of valid index pairs. In particular, we show how to construct linear permutation pairs achieving d_min 3, and establish a lower bound in terms of the description rate R, for the highest value of m for which such permutations exist. For the case when one description is known to be correct, we propose a new performance measure, denoted by dside,min. This represents the minimum Hamming distance of the set of indexes of one description, when the index of the other description is fixed. We prove the close connection between the problem of robust permutations design under the new criterion and the anti-bandwidth problem in a certain graph derived from a hypercube. Leveraging this connection, we settle the problem of existence of permutations achieving d_side,min ≥ 2, respectively d_min ≥ 2, and show their construction. Further, we develop a technique for constructing linear permutation pairs achieving d_side,min ≥ h based on linear (R, ⌈log2 m⌉) channel codes of minimum Hamming distance h + 1. In addition, tight bounds in terms of R, on the maximum achievable value of d_side,min are derived for m = 2, 3, 4.