DocumentCode
1767730
Title
Design and FPGA implementation of an all-digital two-quadrant general pulse-width modulator
Author
Di Piazza, M.C. ; Luna, M. ; Vitale, G.
Author_Institution
Ist. di Studi sui Sist. Intelligenti per l´Autom. (ISSIA), Palermo, Italy
fYear
2014
fDate
1-4 June 2014
Firstpage
1328
Lastpage
1335
Abstract
This paper proposes an all-digital general pulse-xwidth modulator (ADGPWM) that is an improvement of the general pulse-width modulator (GPWM). The ADGPWM allows overmodulation and negative carrier and reference signals to be managed. The proposed all-digital implementation is suited both to serial/concurrent data processing platforms and to integrated circuit implementation, to realize several control algorithms for switching power converters. The VHDL design of the ADGPWM is synthesized and tested on a board which is based on a commercial field-programmable-gate-array (FPGA). Several details of the all-digital implementation are discussed thoroughly and experimental results are given in order to assess its validity.
Keywords
field programmable gate arrays; integrated circuits; power convertors; pulse width modulation; ADGPWM; FPGA implementation; VHDL design; all-digital two quadrant general pulse width modulator; field programmable gate array; integrated circuit implementation; negative carrier; reference signals; serial-concurrent data processing platforms; switching power converters; Clocks; Data processing; Equations; Field programmable gate arrays; Pulse width modulation; Switches; all digital implementation; field programmable gate array (FPGA); general pulse width modulator (GPWM); negative carrier; overmodulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics (ISIE), 2014 IEEE 23rd International Symposium on
Conference_Location
Istanbul
Type
conf
DOI
10.1109/ISIE.2014.6864807
Filename
6864807
Link To Document