• DocumentCode
    1768330
  • Title

    A novel DA-based architecture for efficient computation of inner-product of variable vectors

  • Author

    Meher, Pramod Kumar ; Sang Yoon Park

  • Author_Institution
    Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2014
  • fDate
    1-5 June 2014
  • Firstpage
    369
  • Lastpage
    372
  • Abstract
    Distributed arithmetic (DA) has been widely used for area-time efficient implementation of inner-products, where one of the vectors is fixed and known a priori. Computation of inner-product of a pair of variable vectors, however, is required very often for matrix-multiplication of different forms, and implementation of digital filters of unknown coefficients and variable lengths. But the possibility of using DA for the computation of inner-product of variable vectors is yet to be explored. In this paper, we analyse the design issues relating to DA-based implementation of inner-product of variable vectors, and derive a novel area-time efficient flexible solution for the bit-parallel DA-based implementation of inner-product of variable vectors and variable inner-product lengths. It is found that the proposed structures are nearly 34% faster than the conventional multiplier-based implementation in average for different inner-product lengths (N = 8, 16, 32 and 64) and for input word-lengths, L = 8 and L = 16. Moreover, proposed designs offer saving of nearly 22% and 36% area-delay product (ADP) and saving of nearly 16% and 24% power delay product (PDP) over the multiplier-based designs for L = 8 and L = 16, respectively, in average, for various inner-product lengths.
  • Keywords
    digital filters; distributed arithmetic; logic design; matrix multiplication; multiplying circuits; vectors; area-delay product; digital filters; distributed arithmetic architecture; matrix multiplication; multiplier-based designs; power delay product; variable inner-product lengths; variable vectors inner-product; Adders; Complexity theory; Digital signal processing; Finite impulse response filters; Random access memory; Table lookup; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
  • Conference_Location
    Melbourne VIC
  • Print_ISBN
    978-1-4799-3431-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2014.6865142
  • Filename
    6865142