DocumentCode
1768397
Title
Memristor modelling
Author
Muthuswamy, Bharathwaj ; Jevtic, Jovan ; Iu, Herbert H. C. ; Subramaniam, C.K. ; Ganesan, Kavita ; Sankaranarayanan, V. ; Sethupathi, K. ; Kim, Heonhwan ; Shah, M. Pd ; Chua, Leon O.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Milwaukee Sch. of Eng., Milwaukee, WI, USA
fYear
2014
fDate
1-5 June 2014
Firstpage
490
Lastpage
493
Abstract
In this paper, we show a simple circuit setup for experimentally plotting the v - i non-transversal pinched-hysteresis Lissajous fingerprint of a physical memristor - the common fluorescent gas discharge tube. The setup helped us investigate the effects of physical parasitics (inductors and capacitors) on the memristor v - i.
Keywords
capacitors; discharge lamps; inductors; memristors; Lissajous fingerprint; capacitor physical parasitics; circuit setup; fluorescent gas discharge tube; inductor physical parasitics; memristor modelling; voltage-current nontransversal pinched hysteresis; Capacitors; Discharges (electric); Electron tubes; Inductors; Integrated circuit modeling; Mathematical model; Memristors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location
Melbourne VIC
Print_ISBN
978-1-4799-3431-7
Type
conf
DOI
10.1109/ISCAS.2014.6865179
Filename
6865179
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