DocumentCode :
1768538
Title :
A single-chip 600-fps real-time action recognition system employing a hardware friendly algorithm
Author :
Zuoxun Hou ; Hongbo Zhu ; Nanning Zheng ; Shibata, Takuma
Author_Institution :
Inst. of Artificial Intell. & Robot., Xi´an Jiaotong Univ., Xi´an, China
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
762
Lastpage :
765
Abstract :
A real-time action recognition system has been developed. In order to achieve an efficient and compact system implementation, a hardware friendly algorithm has been explored and employed in building the system. The core functions of the system, namely the whole action recognition algorithm including the motion detection, motion feature vector generation, nearest neighbor search, are entirely realized on a single FPGA chip. Operating at 63 MHz, the system can process QVGA (320 × 240) videos at a speed of 600-fps. The robustness of the system is demonstrated by real environment experiments on gesture recognition.
Keywords :
feature extraction; field programmable gate arrays; gesture recognition; image motion analysis; FPGA chip; field programmable gate array; frequency 63 MHz; gesture recognition; hardware friendly algorithm; motion detection; motion feature vector generation; nearest neighbor search; single-chip real-time action recognition system; whole action recognition algorithm; Feature extraction; Hardware; Prototypes; Real-time systems; Support vector machine classification; Vectors; Videos;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
Type :
conf
DOI :
10.1109/ISCAS.2014.6865247
Filename :
6865247
Link To Document :
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