A hybrid analog/digital Spike-Timing Dependent Plasticity learning circuit for neuromorphic VLSI multi-neuron architectures

To endow large scale VLSI networks of spiking neurons with learning abilities it is important to develop compact and low power circuits that implement synaptic plasticity mechanisms. In this paper we present an analog/digital Spike-Timing Dependent Plasticity (STDP) circuit that changes its internal state in a continuous analog way on short biologically plausible time scales and drives its weight to one of two possible bi-stable states on long time scales. We highlight the differences and improvements over previously proposed circuits and demonstrate the performance of the new circuit using data measured from a chip fabricated using a standard 180nm CMOS process. Finally we discuss the use of stochastic learning methods that can best exploit the properties of this circuit for implementing robust machine-learning algorithms.