Title :
A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifter
Author :
Mohammadi, Bahareh ; Rodrigues, Joachim Neves
Author_Institution :
Electr. & Inf. Technol., Lund Univ., Lund, Sweden
Abstract :
A conventional level-shifter is modified to extend the operation range down to subthreshold regime. Leakage current is reduced by utilizing transistor stacking, channel stretching, and reverse body biasing. The design has a standard-cell compliant layout and is fully integrated in a conventional digital design flow. The level-shifter is manufactured in 65nm CMOS, and functionality is verified by measurements. The proposed design is capable of converting 0.12 to 1.2V in a single stage, and has a static power consumption of 640pW at a 0.12 to 1V conversion. The minimum energy/cycle of 28 fJ/cycle with a conversion speed of 72MHz was observed at 0.3 to 1V conversion.
Keywords :
CMOS integrated circuits; MOSFET; integrated circuit design; low-power electronics; channel stretching; digital design flow; frequency 72 MHz; leakage current; level-shifter; power 640 pW; reverse body biasing; size 65 nm; standard-cell compliant layout; transistor stacking; voltage 0.12 V to 1.2 V; Current measurement; Delays; Leakage currents; MOSFET; Power measurement; Propagation delay;
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
DOI :
10.1109/ISCAS.2014.6865304
