Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors

Author

Auras, Dominik ; Leupers, Rainer ; Ascheid, Gerd

Author_Institution

Inst. for Commun. Technol. & Embedded Syst., RWTH Aachen Univ., Aachen, Germany

fYear

2014

fDate

1-5 June 2014

Firstpage

1018

Lastpage

1021

Abstract

A computational complexity analysis of matrix inversion used in soft-input soft-output minimum mean square error (MMSE) MIMO detectors and a comprehensive literature comparison of corresponding VLSI implementations are presented. They indicate that the application specific integrated circuit (ASIC) proposed in this paper is - to the best of our knowledge - the most area-throughput efficient VLSI architecture reported so far, outperforming the second best by a factor of 1.7×. The ASIC achieves the IEEE 802.11n standard´s peak data rate of 600 Mbit/s.

Keywords

MIMO communication; VLSI; application specific integrated circuits; least mean squares methods; matrix inversion; ASIC; IEEE 802.11n standard; VLSI implementations; application specific integrated circuit; bit rate 600 Mbit/s; computational complexity analysis; matrix inversion; soft-input soft-output MMSE MIMO detectors; soft-input soft-output minimum mean square error MIMO detectors; Application specific integrated circuits; Computer architecture; Decoding; Detectors; MIMO; Matrix decomposition; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

Conference_Location

Melbourne VIC

Print_ISBN

978-1-4799-3431-7

Type

conf

DOI

10.1109/ISCAS.2014.6865311

Filename

6865311