• DocumentCode
    1768836
  • Title

    A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications

  • Author

    de Melo, Joao L. A. ; Querido, Fabio ; Paulino, Nuno ; Goes, Johannes

  • Author_Institution
    Fac. de Cienc. e Tecnol., Univ. Nova de Lisboa, Caparica, Portugal
  • fYear
    2014
  • fDate
    1-5 June 2014
  • Firstpage
    1340
  • Lastpage
    1343
  • Abstract
    A 0.4-V opamp-less ΣΔ modulator for biomedical applications is presented. The continuous-time (CT) 2nd order ΣΔ modulator is realized using a passive filter topology. In order to obtain a small area, all capacitors are realized using parallel compensated depletion-mode MOSCAPs. To maximize the performance, genetic algorithms (GAs) are used to optimize the circuit for smaller area and higher signal-to-noise-plus-distortion ratio (SNDR). In the dynamic comparator, which is the only active block in the circuit, bulk-driven technique is used to obtain lower supply voltage operation. The circuit was designed in a 130 nm CMOS technology and, using a clock frequency of 2 MHz, has a bandwidth of 10 kHz to cover the most common bio-potential signals. The electrical transient noise simulation results show that the circuit achieves a peak SNDR of 58 dB and a dynamic range of 64 dB while dissipating only 410 nW, which corresponds to an energy efficiency of 32 fJ/conv.-step.
  • Keywords
    CMOS integrated circuits; biomedical electronics; continuous time filters; genetic algorithms; passive filters; sigma-delta modulation; 2nd order ΣΔ modulator; CMOS technology; GA; MOSCAPs; SNDR; bandwidth 10 kHz; bio-potential signals; biomedical applications; bulk-driven technique; clock frequency; dynamic comparator; electrical transient noise simulation; energy efficiency; frequency 2 MHz; genetic algorithms; noise figure 58 dB; noise figure 64 dB; opamp-less continuous-time ΣΔ modulator; parallel compensated depletion-mode; passive filter topology; power 410 nW; signal-to-noise-plus-distortion ratio; size 130 nm; voltage 0.4 V; CMOS integrated circuits; CMOS technology; Capacitors; Frequency measurement; Latches; Low voltage; Modulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
  • Conference_Location
    Melbourne VIC
  • Print_ISBN
    978-1-4799-3431-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2014.6865391
  • Filename
    6865391