A capacitor constructed bypass window switching scheme for energy-efficient SAR ADC

A new highly energy-efficient SAR ADC with capacitor constructed bypass-window structure is proposed for low-power biomedical applications. The proposed structure is able to bypass the first few conversion phases when the input signal is within a pre-defined window, resulting in an overall power reduction of 59% when the input signal has a possibility of 80% to activate the bypass-window function. Meanwhile, this structure maintains symmetry and has good common-mode noise immunity. Extra comparators and external window-reference voltage are not needed in this new structure. This circuit is designed in 40nm 1P6M CMOS technology. Simulation results show that the ADC achieves a Signal-to-Noise-and-Distortion-Ratio (SNDR) of 61.55 dB when it runs at 1V and at a sampling rate of 2-MS/s. The total power consumption is 11.82μW and the Figure-of-Merit (FoM) is 6.1 fJ/conversion-step.