DocumentCode :
1768846
Title :
Rail-to-rail CMOS complementary input stage with alternating active differential pairs
Author :
Valero, M.R. ; Roman-Loera, Alejandro ; Ramirez-Angulo, Jaime ; Medrano, N. ; Celma, S.
Author_Institution :
Group of Electron. Design - I3A, Univ. of Zaragoza, Zaragoza, Spain
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
1356
Lastpage :
1359
Abstract :
A simple and power efficient scheme for input rail-to-rail Op-Amp operation with constant gm and CMRR over the common mode input range is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. Three implementations of the scheme are discussed. They use very compact control circuitry to turn only one of the differential pairs at a time. Simulations and experimental verification of the proposed scheme are provided from a test chip prototype in 0.5μm CMOS technology.
Keywords :
CMOS analogue integrated circuits; operational amplifiers; CMRR; active differential pairs; common mode input range; compact control circuitry; complementary differential pair; input rail-to-rail op-amp operation; rail-to-rail CMOS complementary input stage; size 0.5 mum; test chip prototype; CMOS integrated circuits; MOS devices; Power dissipation; Rail to rail amplifiers; Rails; Transistors; Voltage control; CMOS Op-Amps; amplifiers; analog integrated circuits; rail -to-rail;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
Type :
conf
DOI :
10.1109/ISCAS.2014.6865395
Filename :
6865395
Link To Document :
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