CMOS inverter analytical delay model considering all operating regions

This paper presents an accurate analytical delay model for CMOS inverter considering both subthreshold and superthreshold operating regions. Previous related work are either only valid for a specific operating condition or assume a step input. Therefore, that is the first approach to consider both different operating regions and input transition time. Moreover, the proposed model also considers several second order effects that influence the CMOS inverter dynamic behavior. Compared to electrical simulations based on BSIM4 transistor model the proposed delay model presents an average error of 2.3% and the worst case error of 6.6%.