Pipeline scanning architecture with computation reduction for rectangle pattern matching in real-time traffic sign detection

This paper describes a novel compact hardware oriented algorithm and its conceptual implementation for real-time traffic signs detection system. The speed limit sign area on a grayscale video frame is detected based on a novel, simple and compact rectangle pattern matching and circle detection modules. The speed limit recognition system is divided into two-pipeline stages. The region of interests is detected by global features of sign and implemented in pipeline, while the speed limit is recognized by local features of numbers. It achieves 100% in sign detection rate and be able to implement on Xilinx SoC Zynq system for real-time processing.