DocumentCode :
1769019
Title :
An efficient high-throughput VLSI architecture for a synchronization block applied to real-time optical OFDM systems
Author :
Ghanaatian, Reza ; Shabany, Mahdi ; Sharifkhani, Mohammad
Author_Institution :
Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
1752
Lastpage :
1755
Abstract :
An efficient low-complexity VLSI architecture for timing synchronization of a real-time intensity modulation direct detection optical OFDM (IMDD-OOFDM) system is proposed, which results in a significant area reduction. This architecture calculates the correlation among cyclic prefix (CP) regions to estimate the beginning of the OFDM symbol. The proposed architecture utilizes only one functional unit for this purpose, while the throughput is devised for high data-rate optical OFDM systems. Synthesis results of this architecture proves an area saving of 31% compared to the previous work. Moreover, the performance of the correlation method is significantly improved due to a modification applied in the algorithm. Simulation results show that the proposed method is very promising for new optical OFDM systems where the number of subcarriers and CP length is usually lower than conventional wireless systems.
Keywords :
OFDM modulation; VLSI; large scale integration; multiplexing; optical modulation; real-time systems; synchronisation; VLSI; cyclic prefix regions; real-time intensity modulation direct detection optical OFDM system; timing synchronization; very large scale integration; wireless systems; Accuracy; Erbium-doped fiber amplifiers; OFDM; Optical modulation; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
Type :
conf
DOI :
10.1109/ISCAS.2014.6865494
Filename :
6865494
Link To Document :
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