• DocumentCode
    1769032
  • Title

    Design of a wideband low power FMCW synthesizer in 65 nm CMOS for radar applications

  • Author

    Supeng Liu ; Yuanjin Zheng ; Xiaofeng He

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2014
  • fDate
    1-5 June 2014
  • Firstpage
    1776
  • Lastpage
    1779
  • Abstract
    The paper presents a design of a low power wide output bandwidth FMCW frequency synthesizer for radar applications. The proposed FMCW frequency synthesizer adopts digital phase locked loop approach and has been implemented in 65 nm CMOS technology. A phase domain model is proposed for analyzing the digital phase locked loop architecture. The FMCW synthesizer is able to generate triangularly modulated continuous wave of 3GHz output bandwidth in X band with linearity error less than 1.4×10-4. It consumes only 7 mA under 1.2 V power supply. The measured phase noise is -105dBc/Hz at 1MHz offset with a centre frequency of 10 GHz.
  • Keywords
    CMOS integrated circuits; CW radar; FM radar; CMOS technology; X band; digital phase locked loop approach; phase domain model; radar applications; triangularly modulated continuous wave; wideband low power FMCW synthesizer; Bandwidth; Frequency measurement; Frequency synthesizers; Phase locked loops; Phase noise; Synthesizers; Voltage-controlled oscillators; FMCW; X band radar; frequency synthesizer; phase locked loop;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
  • Conference_Location
    Melbourne VIC
  • Print_ISBN
    978-1-4799-3431-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2014.6865500
  • Filename
    6865500