Title :
Micropower two-stage amplifier employing recycling current-buffer Miller compensation
Author :
Wei Wang ; Zushu Yan ; Pui-In Mak ; Man-Kay Law ; Martins, Rui P.
Author_Institution :
State-Key Lab. of Analog & Mixed-Signal VLSI, Univ. of Macau, Macao, China
Abstract :
Proposed is a two-stage amplifier exploiting recycling current-buffer Miller compensation (CBMC). By reusing the most current-consuming devices in the 1st stage as current buffer, such an amplifier not only can preserve the merits of typical CBMC implementation in creating the beneficial left-half-plane (LHP) zero, but also can avoid the drawbacks of typical CBMC scheme from degrading the power efficiency, DC gain, dc offset and noise performances. Optimized in 0.18μm CMOS via a low-power design procedure, the amplifier achieves >90dB DC gain, 4.5MHz unity-gain frequency and 57.2° phase margin at a 100pF capacitive load. The average slew rate and 1% settling time are 2.68V/μs and 0.239μs, respectively. The amplifier draws 22μA at a 1.2V supply.
Keywords :
CMOS integrated circuits; amplifiers; buffer circuits; circuit stability; low-power electronics; CBMC; CMOS technology; capacitance 100 pF; current 22 muA; frequency 4.5 MHz; left-half-plane zero; low-power design; micropower two-stage amplifier; recycling current-buffer Miller compensation; size 0.18 mum; voltage 1.2 V; CMOS integrated circuits; Gain; Noise; Operational amplifiers; Recycling; Transistors;
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
DOI :
10.1109/ISCAS.2014.6865528
