• DocumentCode
    1769107
  • Title

    Improving data cache performance using Persistence Selective Caching

  • Author

    Kumar, Sahoo Subhendu ; van Leuken, Rene

  • Author_Institution
    Circuits & Syst. Group, Delft Univ. of Technol., Delft, Netherlands
  • fYear
    2014
  • fDate
    1-5 June 2014
  • Firstpage
    1945
  • Lastpage
    1948
  • Abstract
    This paper presents Persistence Selective Caching (PSC), a selective caching scheme that tracks the reusability of L1 data cache (L1D) lines at runtime, and moves lines with sufficient potential for reuse to a low-latency, low-energy assist cache from where subsequent references to them are serviced. The selectivity of PSC is configurable, and can be adjusted to suit the varying memory access characteristics of different applications, unlike existing schemes. By effectively identifying reusable cache lines and storing them in the assist, PSC reduces average memory access time by upto 59% as compared to competing schemes and conventional data caches. Furthermore, by ensuring that only reusable lines are cached by the assist, PSC reduces cache line movements, and thus decreases average energy per access by upto 75% over other assists.
  • Keywords
    cache storage; memory architecture; L1 data cache reusability; L1D lines; PSC; PSC selectivity; data cache performance; low-energy assist cache; memory access characteristics; memory access time; persistence selective caching; reusable cache lines; Energy consumption; Memory management; Proposals; Runtime; Static VAr compensators; Tracking; cache memory; memory architecture; memory management; microprocessors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
  • Conference_Location
    Melbourne VIC
  • Print_ISBN
    978-1-4799-3431-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2014.6865542
  • Filename
    6865542