DocumentCode :
1769207
Title :
A 0.96mW, 5.3–6.75GHz, phase-interpolation and quadrature-generation method using parametric energy transfer in 65nm CMOS
Author :
Bhardwaj, Kshitij ; Lee, Tong H.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
2145
Lastpage :
2148
Abstract :
We present a quadrature-generation method that is based on parametric energy transfer to an LC resonator. The phase-sensitive nature of parametric pumping is used to generate a signal in quadrature with an incoming clock signal. The pumped LC resonator is tuned by a digital calibration loop toward the input signal frequency across the tuning range. Phase interpolation is achieved by tuning the resonator frequency away from the incoming signal frequency. Implemented in 65nm CMOS, the prototype dissipates 0.96mW and provides quadrature signals with an accuracy of 2 degrees (~1ps) over an input frequency range of 5.3-to-6.75GHz. The method is also used to achieve a phase interpolation range of 23 to 170 degrees at 6GHz.
Keywords :
CMOS digital integrated circuits; LC circuits; clocks; microwave integrated circuits; signal generators; CMOS; clock signal; digital calibration loop; frequency 5.3 GHz to 6.75 GHz; parametric energy transfer; parametric pumping; phase interpolation range; phase-sensitive nature; power 0.96 mW; pumped LC resonator; quadrature signals; quadrature-generation method; resonator frequency; signal frequency; tuning range; CMOS integrated circuits; Capacitance; Capacitors; Clocks; Interpolation; Logic gates; Resonant frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
Type :
conf
DOI :
10.1109/ISCAS.2014.6865592
Filename :
6865592
Link To Document :
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