Full-stream architecture for ray tracing with efficient data transmission

In this paper, we focus on the impact of a memory bandwidth limitation by analyzing the bandwidth consumption for a ray tracing system and present an energy efficient data transmission method using a dedicated interface between the processor and ray tracing hardware engine. To achieve real-time ray tracing, we propose a full-stream architecture through the use of this dedicated interface. For an evaluation of our approach, we implemented a prototype ray tracing architecture using our approach on an FPGA platform. Our experimental results, indicate that our approach shows an average reduction in system memory bandwidth of 48% and an average performance improvement of 50%.