DocumentCode
1769231
Title
A design of simulation and analysis platform of BIT false alarm considering stochastic characteristics
Author
Junyou Shi ; Weiran An ; Kan Liu
Author_Institution
Sch. of Reliability & Syst. Eng., Beihang Univ., Beijing, China
fYear
2014
fDate
24-27 Aug. 2014
Firstpage
456
Lastpage
459
Abstract
Base on a comprehensive analysis of causes and classification of BIT false alarm, the stochastic characteristics mechanism of BIT false alarm is summarized, the parameters for BIT false alarm assessment is proposed, and the breakthrough of the method of BIT false alarm caused by which the noise analog and the research of BIT modeling and simulation methods considering stochastic characteristics. Therefore, the design of interface profile of BIT false alarm considering stochastic characteristics is completed. According to the methods of simulation, modeling and assessment of BIT false alarm considering stochastic characteristics, the simulation platform of BIT false alarm randomness is designed, combined with typical BIT false alarm circuit simulation cases in addition to provide technical support to apply for the practical application of engineering tools According to the existing simulation analysis of BIT false alarm circuit, considering the description of randomness factors and stochastic characteristics considering interference, study the BIT detection threshold randomness modeling, the methods of simulation considering the randomness of BIT, the design of false alarm simulation profile considering stochastic characteristics are achieved. Moreover, the process of working on the simulation platform is completed into designing framework and the functional modules in accordance with completing the design of input and output data structure, and the overall algorithm of simulation platform, through the communication interface of Matlab, Orcad and Labview joint simulation to complete the final design of each function, and the randomness of BIT false alarm.
Keywords
built-in self test; design for testability; integrated circuit testing; stochastic processes; BIT detection threshold randomness modeling; BIT false alarm circuit; Labview; Matlab; Orcad; built-in-test; false alarm simulation; Analytical models; Data models; Integrated circuit modeling; Load modeling; Mathematical model; Stochastic processes; BIT(Built-in Test); False Alarm; Simulation; Stochastic Characteristic;
fLanguage
English
Publisher
ieee
Conference_Titel
Prognostics and System Health Management Conference (PHM-2014 Hunan), 2014
Conference_Location
Zhangiiaijie
Print_ISBN
978-1-4799-7957-8
Type
conf
DOI
10.1109/PHM.2014.6988214
Filename
6988214
Link To Document