Compact hardware oriented number recognition algorithm for real-time speed traffic-sign recognition

Author

Yamamoto, Manabu ; Anh-Tuan Hoang ; Omori, Mutsumi ; Koide, Tetsushi

Author_Institution

Grad. Sch. of Adv. Sci. of Matter, Hiroshima Univ., Higashi-Hiroshima, Japan

fYear

2014

fDate

1-5 June 2014

Firstpage

2535

Lastpage

2538

Abstract

The purpose of this research is development of an algorithm for hardware implementation for number recognition applying in speed traffic-sign recognition system for car driving assistant. We recognize the speed limit of the speed traffic-sign using hardware oriented extraction algorithm. The numbers are recognized by comparing their feature values with the recognized features. The proposed hardware oriented number recognition algorithm achieves almost 100 % in recognition rate in 31 scenes in highways and 23 scenes in local roads.

Keywords

driver information systems; feature extraction; intelligent transportation systems; road traffic; car driving assistant; compact hardware oriented number recognition algorithm; hardware oriented extraction algorithm; real-time speed traffic-sign recognition system; Feature extraction; Hardware; Histograms; Image recognition; Roads; Vehicles; FPGA Implementation; ITS; Number Recognition; Real-Time; Speed Traffic-Sign Recognition;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

Conference_Location

Melbourne VIC

Print_ISBN

978-1-4799-3431-7

Type

conf

DOI

10.1109/ISCAS.2014.6865689

Filename

6865689