A radio-controlled receiver for clocks/watches and alarm applications

This paper presents a radio-controlled clock/alarm (RCC) receiver. The proposed RCC receiver adopts a signal transmitted technique via amplitude modulation (AM) principle. This I/Q DPS adopts a multi-phase sampled technique using a multi-phase ring oscillator. The decoding circuit can amplify the input signal and filter the noise signal to achieve high quality signal source. The low noise amplifier (LNA) circuit can receive the smaller input power. The operational frequency of all-digital clock generator (ADCG) is programmable for the broadcast frequency of local communication systems, such as the DCF77 (Germany), WWVB (US), JJY (Japan), BPC (CN), and MSF (UK). The digital loop filter of ADCG adopts a successive-approximation register (SAR) algorithm for fast locking time. This RCC receiver is implemented in a 0.18 um CMOS process and the core area of RCC receiver is 1152 × 1572 μm². The accuracies of operational frequencies of ADCG are less than ±264 ppm for all radio broadcasting frequencies. The voltage gain of LNA is 24.44 dB to achieve the lower input power. The measured environment of clock/alarm application is set and verified for the test chip of RCC receiver.