DocumentCode :
1769470
Title :
A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR
Author :
Shang-Hsien Yang ; Yuan-Han Yang ; Ke-Horng Chen ; Chung-Chih Hung ; Chin-Long Wey ; Ying-Hsi Lin ; Tsung-Yen Tsai ; Chen-Chih Huang ; Chao-Cheng Lee ; Zhih Han Tai ; Yi Hsuan Cheng ; Chi Chung Tsai ; Hsin-Yu Luo ; Shih-Ming Wang ; Long-Der Chen ; Cheng-C
Author_Institution :
Inst. of Electr. & Comput. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
2676
Lastpage :
2679
Abstract :
This paper presents a dual-level dual-phase pulse-width modulation (DLDP PWM) Class-D audio amplifier circuit which enhance amplifier linearity and reduce distortion. The proposed DLDP PWM Class-D audio amplifier includes two sets of non-overlapping triangular waves, each at its respectful offset levels. Each set of triangular waves is composed of two 180° out-of-phase triangular waves. The differential power stage consists of 8 power transistors, with voltage swings up to +/- 6V. Simulated results shows that the proposed DLDP PWM Class-D audio amplifier features an SNR up to 105 dB, and the THD is suppressed below 0.001 %, with the 3rd harmonic below -102 dBV.
Keywords :
audio-frequency amplifiers; harmonic distortion; power amplifiers; power transistors; pulse width modulation; PWM Class-D audio amplifier; SNR; THD; differential power stage; dual-level dual-phase pulse-width modulation class-D amplifier; nonoverlapping triangular waves; power transistors; voltage 6 V; Delays; Generators; Power transistors; Pulse width modulation; Signal to noise ratio; Switches; Class-D; THD; dual-level dual-phase PWM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
Type :
conf
DOI :
10.1109/ISCAS.2014.6865724
Filename :
6865724
Link To Document :
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