A 2.2GHz-80dBΩ CMOS receiver front-end for short-range optical communication employing DMT/OFDM

This paper presents a novel receiver architecture for short-range optical communications using advanced modulation schemes in deep submicron CMOS technology. A prototype design including a 270×270 μm² integrated photodiode interfaced with an ultra-low impedance transimpedance amplifier (TIA) and a continuous time linear equalizer (CTLE) is simulated in IBM 0.13 μm CMOS technology. To demonstrate the flexibility of the proposed design, simulation results for both on-off-keying (OOK) and 64-QAM baseband orthogonal frequency division multiplexed (OFDM) data are presented. With 40 mW power dissipation from a 1.2 V supply and an estimated 15 pF photodiode capacitance, binary modulation data rate of 3.2 Gbps with a sensitivity of -6.7dBm (BER=10^-12) is achieved in post layout simulations. In the multi carrier modulation scenario, the receiver achieves a multi-tone power ratio (MTPR) of 28 dBc maintaining 200mV peak-to-peak output voltage for an input signal peak-to-average ratio (PAR) of 4.8dB. The received constellation shows minimal scattering due to the amplifier non-linearity.