• DocumentCode
    1770294
  • Title

    DSP-based implementation of soft Viterbi decoder for power line communications

  • Author

    Bali, Mohamed Chaker ; Rebai, Chiheb

  • Author_Institution
    GRESCOM Res. Lab., Univ. of Carthage, Tunis, Tunisia
  • fYear
    2014
  • fDate
    10-13 Jan. 2014
  • Firstpage
    62
  • Lastpage
    67
  • Abstract
    When using power line communications (PLC) modems for Smart Grids (SG), achieving fast and reliable data transmission is one of the key issues. This paper investigate a soft Viterbi decoder to reduce errors effects of noises and attenuations in Spread Frequency Shift Keying (S-FSK) communication scheme. Through numerical simulations, the improvements of the proposed Viterbi decoder are shown in terms of BER performance. Furthermore, practical realization on low-cost embedded processor is discussed. The whole design of a narrowband S-FSK based PLC modem has been implemented and optimization for real time processing.
  • Keywords
    Viterbi decoding; carrier transmission on power lines; digital signal processing chips; frequency shift keying; modems; power system management; power system measurement; smart power grids; DSP; PLC modem; errors effect reduction; low cost embedded processor; power line communication; real time processing; reliable data transmission; smart power grid; soft Viterbi decoder; spread frequency shift keying communication; Bit error rate; Decoding; Frequency shift keying; Modems; Noise; Receivers; Viterbi algorithm; FEC; S-FSK; Smart Grids; Viterbi decoding; convolutional code; power line communications;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Communications and Networking Conference (CCNC), 2014 IEEE 11th
  • Conference_Location
    Las Vegas, NV
  • Print_ISBN
    978-1-4799-2356-4
  • Type

    conf

  • DOI
    10.1109/CCNC.2014.6866549
  • Filename
    6866549