Abstract :
As the number of on-die transistors continues to grow, new computing models are needed to utilize this growing compute capacity despite a clock-frequency scaling wall, and relatively sluggish improvements in I/O bandwidth. The spatial compute and programming model, as introduced by the OpenSPL [1] specification, provides a method for taking advantage of compute capacity offered by current and trending hardware technology. With spatial computing, compute processing units are laid out in space (either physically or conceptually) and connected by flows of data. The result of this approach is compute implementations which are naturally highlyparallel and thus very effectively use modern transistor-rich hardware.
Conference_Titel :
Application-specific Systems, Architectures and Processors (ASAP), 2014 IEEE 25th International Conference on