Abstract :
With the wide adoption of nanometer technologies, it has become crucial for today´s SOCs to use advanced test and diagnosis solutions. These solutions provide comprehensive detection of not only random defects, but also systematic and process variation defects often manifested under unique test corners. Moreover, with the adoption of FinFET technologies, these advanced solutions are extended to cover new FinFET specific defects. This keynote, besides discussing the key trends and challenges of advanced nanometer technologies, will cover solutions to handle the wide range of potential defects in today´s SOCs. It will also address post-silicon analysis and yield optimization trade-offs using volume diagnostic, failure coordinate calculation, reconfiguration and repair. With the proliferation of high-density packaging, such as 2.5D and 3D-ICs, this keynote will also cover testing and diagnosis of dies and interconnects, via advanced test solutions based on IEEE test access standards.
