A novel impedance calculation method and its time efficiency evaluation

Author

Brenkus, Juraj ; Stopjakova, Viera ; Arbet, Daniel ; Gyepes, Gabor ; Majer, Libor

Author_Institution

Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia

fYear

2014

fDate

23-25 April 2014

Firstpage

99

Lastpage

103

Abstract

A novel resistance calculation method based on eigen calculus of the circuit´s nodal admittance matrix is described and evaluated in this paper. More specifically, the calculation time efficiency of the method is examined and comparison to the traditional LU factorization based method is made. This evaluation is based on real and complex matrices that are both symmetrical and non-symmetrical as well. Circuits sizes taken into account range from 25 to 3600 nodes. The obtained results demonstrate the time efficiency of this method, especially, for non-symmetrical matrices. The proposed method could be used to speed-up the fault simulations and improve test development of analog circuits.

Keywords

analogue circuits; circuit testing; eigenvalues and eigenfunctions; fault simulation; matrix decomposition; LU factorization; analog circuit test development; circuit nodal admittance matrix; complex matrix; eigen calculus; fault simulation; impedance calculation method; nonsymmetrical matrix; resistance calculation method; time efficiency evaluation; Circuit faults; Complexity theory; Impedance; Mathematical model; RLC circuits; Resistance; Symmetric matrices; analog circuit; fault analysis; impedance calculation;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on

Conference_Location

Warsaw

Print_ISBN

978-1-4799-4560-3

Type

conf

DOI

10.1109/DDECS.2014.6868771

Filename

6868771