The LSI implementation of a memory based field programmable device for MCU peripherals

A Field Programmable Sequencer and Memory (FPSM), which is an embedded memory based programmable device for peripherals on micro controller units, has been proposed at the architecture level. The FPSM functions not only as the memory but also as finite autonomous state transition controls independent of the CPU. In this paper, implementation on the LSI is described. The FPSM, fabricated using 180-nm 1-poly and 5-metal CMOS process technology, operates at the maximum frequency of 61.5 MHz with a power supply voltage of 1.8 V. The power consumption is 1.0 mW per programmable unit at the target frequency of 50 MHz. The performance of fundamental peripherals such as timers, shifters, serial receivers/transmitters, FIFOs and Pulse Width Modulations (PWM) are evaluated and verified.