DocumentCode
177294
Title
Navigating the cache hierarchy with a single lookup
Author
Sembrant, A. ; Hagersten, Erik ; Black-Schaffer, D.
Author_Institution
Dept. of Inf. Technol., Uppsala Univ., Uppsala, Sweden
fYear
2014
fDate
14-18 June 2014
Firstpage
133
Lastpage
144
Abstract
Modern processors optimize for cache energy and performance by employing multiple levels of caching that address bandwidth, low-latency and high-capacity. A request typically traverses the cache hierarchy, level by level, until the data is found, thereby wasting time and energy in each level. In this paper, we present the Direct-to-Data (D2D) cache that locates data across the entire cache hierarchy with a single lookup.
Keywords
cache storage; D2D cache; Direct-to-Data cache; cache energy; cache hierarchy navigation; cache performance; Abstracts; Arrays; Navigation; Program processors; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on
Conference_Location
Minneapolis, MN
Print_ISBN
978-1-4799-4396-8
Type
conf
DOI
10.1109/ISCA.2014.6853203
Filename
6853203
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