Dynamic and steady-state behavior of a paralleling three-phase AC-to-DC converter with reduced DC bus capacitor

Dynamic and steady-state behavior of a paralleling three-phase AC-to-DC converter with reduced dc bus capacitor and nearly unity power factor is investigated in this paper. The circuit is simulated and the simulation results are analyzed and verified by measurements. A 1.5 kW laboratory prototype with small dc bus capacitance 690 μF (0.46 μF /W) is implemented and tested to verify the feasibility of the proposed system. Steady-state and dynamic behavior is the other main advantage of the proposed system. The possibility of using, in the proposed system, a reduced ratio capacitance/watt lower than the typical values used in commercial applications, while maintaining the accurate input current and output voltage regulation, is also theoretically proved.