• DocumentCode
    1774716
  • Title

    A new PLL based on fast positive and negative sequence decomposition algorithm with matrix operation under distorted grid conditions

  • Author

    Shaohua Sun ; Hongqi Ben ; Tao Meng ; Jinyong Zhang

  • Author_Institution
    Sch. of Electr. Eng. & Autom., Harbin Inst. of Technol., Harbin, China
  • fYear
    2014
  • fDate
    18-21 May 2014
  • Firstpage
    3213
  • Lastpage
    3217
  • Abstract
    This paper investigates and presents a new phase locked loop (PLL) based on fast positive and negative sequence decomposition algorithm with matrix operation under distorted grid conditions. In renewable energy integration filed, some information of unbalanced and distorted grid voltages, such as frequency and phase angle of fundamental wave, should be exactly and quickly detected for reliable operation. Due to the unfavorable transient response and very poor phase angle tracking of PLL based on the positive and negative sequence components decomposition with a quarter cycle delayed α variable and β variable in a stationary α-β reference frame under distorted grid conditions, a fast and exact PLL method by matrix operation of α variable and β variable of grid voltage is proposed. This process is achieved by transforming the positive, negative and low-order harmonics into multiple synchronous reference frames, and then by a matrix operation, the frequency and phase information are extracted. Thus the positive and negative sequences are separated after 5 sampling periods. The paper presents a detailed description and derivation of the proposed PLL method. Simulations and experimental results based on digital signal processor chip TMS320F2812 verify and validate the excellent performance of the new PLL method.
  • Keywords
    matrix algebra; phase locked loops; transient response; PLL method; digital signal processor chip; distorted grid conditions; distorted grid voltages; fast positive and negative sequence decomposition algorithm; low-order harmonics; matrix operation; multiple synchronous reference frames; phase locked loop; renewable energy integration; transient response; Phase locked loops; Radio access networks; matrix operation; phase locked loop; positive and negative sequence decomposition algorithm; unbalanced and distorted grid conditions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International
  • Conference_Location
    Hiroshima
  • Type

    conf

  • DOI
    10.1109/IPEC.2014.6870147
  • Filename
    6870147