Title :
A novel hardware Gaussian noise generator using Box-Muller and CORDIC
Author :
Yuting Wang ; Zhisong Bie
Author_Institution :
Key Lab. of Univ. Wireless Commun., Univ. of Posts & Telecommun., Beijing, China
Abstract :
A novel hardware Gaussian noise generator based on the Box-Muller method and the Coordinate Rotation Digital Computer (CORDIC) Algorithm is presented. The main novelties of this work are using Modified CORDIC Algorithm with Domain Folding (MDF-CORDIC) algorithm and expanding the range of convergence of the CORDIC algorithm to improve the operation accuracy for the elementary functions involved in the Box-Muller method. Due to the modified CORDIC algorithm, two 16-bit highly accurate noise samples are generated every clock cycle and the accuracy can reach 10-7 while the conventional is 10-3. The noise generator can also accurately model a true Gaussian probability density function even at high σ values. This design is implemented on a Xilinx XC4VLX15 Virtex-4 device field-programmable gate array (FPGA) at 155 MHz; it takes up 5% of the device and produces 155 million samples per second.
Keywords :
Gaussian noise; digital arithmetic; field programmable gate arrays; probability; signal processing; Box-Muller; CORDIC; FPGA; Gaussian probability density function; Xilinx XC4VLX15 Virtex-4 device; clock cycle; coordinate rotation digital computer algorithm; field-programmable gate array; frequency 155 MHz; hardware Gaussian noise generator; word length 16 bit; Accuracy; Algorithm design and analysis; Computer architecture; Convergence; Equations; Hardware; Mathematical model;
Conference_Titel :
Wireless Communications and Signal Processing (WCSP), 2014 Sixth International Conference on
Conference_Location :
Hefei
DOI :
10.1109/WCSP.2014.6992107
