Detecting Hardware Trojan through heuristic partition and activity driven test pattern generation

Hardware Trojan has emerged as an impending security threat to many critical systems. However, detecting hardware Trojan is extremely difficult due to Trojans are always triggered by rare events. Side-channel signal analysis is effective in detecting Trojan but facing the challenge with process variation and environment noise in nanotechnology. Moreover, side-channel approaches that analyze global signals cannot scale well to large circuits. This paper presents a heuristic partition and test pattern generation based localized signal analysis method for hardware Trojan detection. First, we partition the design into regions controlled by scan chains. Then a test vector ordering algorithm is used to generate optimized vectors which can magnify the activity in the target region where Trojan may be located. At last, power ports are placed in each region to measure the localized transient current anomalies for Trojan detection, while a signal calibration technique is used to eliminate the negative effect of process variation and noise. We evaluate our approach on ISCAS89 benchmark circuits and the results show that the proposed scheme can magnify the detection sensitivity in multiples from the state-of-the-art. Two further benefits of this method are that it can scale well to large circuits and determine Trojan´s location.