Task synthesis for latency-sensitive synchronous block diagram

Synchronous block diagrams (SBDs) are commonly used in model-based design tools such as Simulink to capture the system behavior. In the multitask software implementation of SBDs, the execution semantics should be preserved in the value and time domains, and the task implementation should provide modular and reusable code. Previous research on component models for code generation did not consider the execution time of block implementations and the time at which outputs are produced, and did not explore the selection of task generation and scheduling based on output latencies. In this work, we propose formulations and algorithms for synthesizing SBDs into software tasks, while optimizing objectives that include timing (latency), modularity, reusability, and code size.