DocumentCode :
1776079
Title :
BDD based area and power efficient digital circuit design using 2T and 4T MUX at 90 nm technology
Author :
Sharma, Praveen Kumar ; Singh, Neeraj Kumar
Author_Institution :
Dept. of Electron. & Commun. Eng., North Eastern Regional Inst. of Sci. & Technol., Itanagar, India
fYear :
2014
fDate :
10-11 July 2014
Firstpage :
7
Lastpage :
11
Abstract :
This paper puts forward digital circuit design using Binary Decision Diagram (BDD). BDDs can be implemented using 2:1 mux. In this paper 2T and 4T mux are used to for digital circuit design. The BDD simulation is done using CUDD-2.5.0 tool and mux implementation is done using DSCH 2.7f and Microwind 2.6k Simulator. Experiments are performed on ISCAS Benchmark Circuits at 90 nm technology. The results show the efficiency of the system.
Keywords :
binary decision diagrams; digital circuits; logic design; BDD based area design; CUDD-2.5.0 tool; DSCH 2.7f; Microwind 2.6k Simulator; binary decision diagram; power efficient digital circuit design; size 90 nm; Adders; Algorithm design and analysis; Boolean functions; Data structures; Hardware design languages; Instruments; Simulated annealing; Binary Decision Diagram; mux; simulated annealing; variable ordering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on
Conference_Location :
Kanyakumari
Print_ISBN :
978-1-4799-4191-9
Type :
conf
DOI :
10.1109/ICCICCT.2014.6992920
Filename :
6992920
Link To Document :
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