Hybrid single electron transistor based octal to binary encoder in 22 nanometer technology

Author

Mukherjee, Sayan ; Jana, Biswabandhu ; Jana, Anindya ; Sing, Jamuna Kanta ; Sarkar, Subir Kumar

Author_Institution

Dept. of Electron. & Telecommun. Eng., Jadavpur Univ., Kolkata, India

fYear

2014

fDate

10-11 July 2014

Firstpage

26

Lastpage

30

Abstract

The co fabrication of SET & CMOS technology has already proved its ability to bring a drastic change in the era of nanodimensional devices. In our present work a well known combinational circuit, octal to binary encoder is demonstrated using hybrid SET-CMOS technology in 22 nanometer node. We have presented power analysis for the circuit here. Power delay product for the circuit has also been done and a comparison is made with the conventional CMOS based circuit. Simulations are done using TCAD with the help of MIB model and BSIM4.6.1 model to establish the feasibility of the proposed model in case of room temperature operation.

Keywords

CMOS integrated circuits; combinational circuits; nanoelectronics; single electron transistors; BSIM4.6.1 model; MIB model; TCAD; binary encoder; combinational circuit; hybrid SET-CMOS technology; hybrid single electron transistor; nanodimensional devices; octal encoder; power analysis; size 22 nm; temperature 293 K to 298 K; CMOS integrated circuits; Capacitance; Junctions; Logic gates; Power demand; Resistance; Single electron transistors; BSIM4.6.1; Hybrid SET-CMOS; MIB; Octal to binary encoder;

fLanguage

English

Publisher

ieee

Conference_Titel

Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on

Conference_Location

Kanyakumari

Print_ISBN

978-1-4799-4191-9

Type

conf

DOI

10.1109/ICCICCT.2014.6992924

Filename

6992924