DocumentCode
1776324
Title
Power and delay comparison of 1 Bit full adder designs at 180nm and 90nm technology
Author
Singh, Neeraj Kumar ; Sharma, Praveen Kumar
Author_Institution
Dept. of Electron. & Commun. Eng., North Eastern Regional Inst. of Sci. & Technol., Nirjuli, India
fYear
2014
fDate
10-11 July 2014
Firstpage
666
Lastpage
670
Abstract
This paper puts forward a comparison between two 1 bit full adder designs: one using 4T XOR and the other using 4:1 MUX based 3 Input XOR. Both are designs are made up of 10 transistors. The simulation is done using Cadence Simulator at 180nm and 90nm Technology. Comparison is made among the two proposed designs with respect to power and delay. The results show the efficiency of the design.
Keywords
adders; logic design; logic gates; transistors; 180nm technology; 4:1 MUX based 3 Input XOR; 4T XOR; 90nm technology; cadence simulator; full adder design; power and delay comparison; transistors; Adders; CMOS integrated circuits; Delays; Instruments; Logic gates; Transient response; Transistors; carry; full adder; mux; sum; xor;
fLanguage
English
Publisher
ieee
Conference_Titel
Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on
Conference_Location
Kanyakumari
Print_ISBN
978-1-4799-4191-9
Type
conf
DOI
10.1109/ICCICCT.2014.6993044
Filename
6993044
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