Magnetic tunnel junctions for future memory and logic-in-memory applications

Memories based on charge storage are gradually approaching the physical limits of scalability. Magnetoresistive random access memory (MRAM) with spin-transfer torque (STT) is a promising candidate for future universal memory. However, the reduction of the switching current density and/or switching time while maintaining high thermal stability are the main challenges of this memory cell. A substantial decrease of the switching time in in-plane magnetic tunnel junctions is achieved by a special design of the free magnetic layer. The scaling potential of this cell based on the thermal stability analysis is discussed. The designed non-volatile memory cell is promising for STT-MRAM arrays. Introducing non-volatility into logic circuits is critical to reduce the standby power and enable instant-on applications. Recently, circuits containing MRAM cells for logic were presented. The logic operations are implemented by using reprogrammable- and implication-based magnetic tunnel junction (MTJ) logic gates providing a new intrinsic logic-in-memory computational platform. A critical analysis of possible tradeoffs in different designs of stateful logic architectures is presented. The analysis indicates that MRAM-based logic is a well suited for high performance parallel non-volatile computations.