A new scalable parallel spatial filter implementation based on data flow graph

Spatial image filters are one of the primary operators in digital image processing and edge detection is one of their most well-known operations. Because of growing demand in applications such as real time video processing and stream image processing, accelerating this family of algorithms based on FPGA platforms has received increased attention. This paper introduces a new implementation of this type of filter. We have used data flow computing concept to invent a novel area and bandwidth efficient edge detector hardware. As theory calculations we expect that this method increases area efficiency up to 30 % related to traditional pixel parallel methods.