Title :
Design of the reset and calibration circuits in a dual stage charge sensitive processing chain based on Time-over-Threshold technique for tracking applications
Author :
Kasinski, Krzysztof ; Kleczek, Rafal
Author_Institution :
Dept. of Meas. & Electron., AGH Univ. of Sci. & Technol., Cracow, Poland
Abstract :
This paper presents the details of the architecture and design of reset (both continuous and pulsed) and calibration circuits implemented in a dual stage charge sensitive processing chain dedicated for input charge measurements based on a Time-over-Threshold (ToT) technique. The combination of two different types feedback reset systems enables solving important problems of charge processing chains, like pile-up effects and excessive dead time of ToT processing in case of artifact hits´ overload. The comparison of proposed solution with other discharge circuits described in the literature is also included.
Keywords :
calibration; low-power electronics; preamplifiers; ToT technique; artifact hit overload; calibration circuit design; discharge circuits; dual stage charge sensitive processing chain; excessive dead time; feedback reset systems; input charge measurements; low-power charge sensitive preamplifiers; pile-up effects; reset circuit design; time-over-threshold technique; tracking applications; Calibration; Capacitors; Charge measurement; Discharges (electric); MOSFET; Resistance; Resistors; low-noise low-power charge sensitive preamplifiers; time-over-threshold;
Conference_Titel :
Mixed Design of Integrated Circuits & Systems (MIXDES), 2014 Proceedings of the 21st International Conference
Conference_Location :
Lublin
Print_ISBN :
978-83-63578-03-9
DOI :
10.1109/MIXDES.2014.6872184