DocumentCode :
1777147
Title :
The piezoelectric transformer field effect transistor
Author :
Agarwal, Sankalp ; Yablonovitch, Eli
Author_Institution :
Univ. of California, Berkeley, Berkeley, CA, USA
fYear :
2014
fDate :
22-25 June 2014
Firstpage :
25
Lastpage :
26
Abstract :
In order to reduce the power consumption of modern electronics, the operating voltage needs to be significantly reduced. Unfortunately, conventional transistors fundamentally require around half a volt to switch. On the other hand, electrical wires only need millivolts to overcome noise and communicate information. This voltage mismatch results in a significant amount of power being wasted by charging the wires to a high voltage. To overcome this mismatch, either a new low voltage switch[1-5] or a voltage transformer is needed. In this paper we propose a new CMOS compatible piezoelectric voltage transformer that can be placed on the gate of each transistor to reduce the voltage needed for switching. This allows for a low voltage to be used to charge the wires while increasing the voltage at the transistor where it´s needed. This results in the Piezoelectric Transformer Field Effect Transistor, or PT-FET.
Keywords :
CMOS analogue integrated circuits; field effect transistors; piezoelectric devices; potential transformers; CMOS compatible piezoelectric voltage transformer; PT-FET; conventional transistors; electrical wires; low-voltage switch; operating voltage reduction; piezoelectric transformer field effect transistor; power consumption reduction; voltage mismatch; Capacitance; Electric potential; Logic gates; Strain; Transistors; Voltage transformers; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference (DRC), 2014 72nd Annual
Conference_Location :
Santa Barbara, CA
Print_ISBN :
978-1-4799-5405-6
Type :
conf
DOI :
10.1109/DRC.2014.6872282
Filename :
6872282
Link To Document :
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