Design and analysis of MoS2-based MOSFETs for ultra-low-leakage dynamic memory applications

Author

Kshirsagar, Chaitanya ; Xu, Wei ; Kim, Chul Han ; Koester, Steven J.

Author_Institution

Univ. of Minnesota - Twin Cities, Minneapolis, MN, USA

fYear

2014

fDate

22-25 June 2014

Firstpage

187

Lastpage

188

Abstract

In this work, we describe the design space required to realize two-dimensional (2D) MoS₂ low-leakage MOSFETs. We combine TCAD electrostatic simulations with an analytical transport model to predict the subthreshold performance of MoS₂ MOSFETs. We further apply this model to a dynamic memory cell design and benchmark the performance advantages compared to conventional low-leakage silicon technology.

Keywords

MOSFET; integrated circuit design; molybdenum compounds; semiconductor device models; storage management chips; technology CAD (electronics); 2D molybdenum disulfide low-leakage MOSFET; MoS₂; TCAD electrostatic simulation; analytical transport model; design space; dynamic memory cell design; low-leakage silicon technology; molybdenum disulfide MOSFET analysis; molybdenum disulfide MOSFET design; subthreshold performance prediction; two-dimensional molybdenum disulfide low-leakage MOSFET; ultralow-leakage dynamic memory application; Analytical models; Logic gates; MOSFET; Performance evaluation; Semiconductor device modeling; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Device Research Conference (DRC), 2014 72nd Annual

Conference_Location

Santa Barbara, CA

Print_ISBN

978-1-4799-5405-6

Type

conf

DOI

10.1109/DRC.2014.6872360

Filename

6872360