DocumentCode :
1777305
Title :
Wafer scalable growth and delamination of graphene for silicon heterogeneous VLSI technology
Author :
Rahimi, S. ; Na, S.R. ; Tao, Li ; Liechti, K. ; Akinwande, Deji
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas - Austin, Austin, TX, USA
fYear :
2014
fDate :
22-25 June 2014
Firstpage :
197
Lastpage :
198
Abstract :
We have demonstrated the state-of-the-art on scalable graphene synthesis, device yield and electrical statistics with the highest performance wafer-scale devices showing electronic properties similar to exfoliated flakes. The mechanical delamination of graphene resulted in high material quality due to residue free pristine graphene surface, and holds promise for wafer-scale BEOL bonding integration of graphene with Si CMOS substrates.
Keywords :
CMOS integrated circuits; VLSI; delamination; elemental semiconductors; graphene; integrated circuit design; semiconductor growth; silicon; wafer bonding; CMOS substrates; Si; device yield; electrical statistics; electronic properties; exfoliated flakes; graphene delamination; high material quality; highest performance wafer-scale devices; mechanical delamination; residue free pristine graphene surface; scalable graphene synthesis; silicon heterogeneous VLSI technology; wafer scalable growth; wafer-scale BEOL bonding integration; CMOS integrated circuits; Delamination; Films; Graphene; Silicon; Substrates; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference (DRC), 2014 72nd Annual
Conference_Location :
Santa Barbara, CA
Print_ISBN :
978-1-4799-5405-6
Type :
conf
DOI :
10.1109/DRC.2014.6872365
Filename :
6872365
Link To Document :
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