DocumentCode :
1777402
Title :
Feasibility analysis of high-density STTRAM designs with crossbar or shared transistor structures
Author :
An Chen
Author_Institution :
TD Res., GLOBALFOUNDRIES, Santa Clara, CA, USA
fYear :
2014
fDate :
22-25 June 2014
Firstpage :
295
Lastpage :
296
Abstract :
The feasibility of high-density STTRAM design utilizing CBA and 1T-nMTJ structures is analyzed with quantitative device and array models. To be effective, both designs have to employ two-terminal selectors connected with MTJs to suppress sneak current. The writing/reading performance of these designs depends critically on the resistance balance between selectors and MTJs. Selectors with strong nonlinearity and resistance comparable with that of MTJ will improve these high-density designs. These designs may help to relax the stringent requirements on STTRAM access transistors.
Keywords :
integrated circuit design; random-access storage; 1T-nMTJ structures; CBA structures; array models; crossbar structures; feasibility analysis; high-density STTRAM designs; quantitative device; reading performance; shared transistor structures; sneak current suppression; spin-transfer-torque RAM access transistors; two-terminal selectors; writing performance; Arrays; Magnetic tunneling; Resistance; Sensors; Transistors; Tunneling magnetoresistance; Varistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference (DRC), 2014 72nd Annual
Conference_Location :
Santa Barbara, CA
Print_ISBN :
978-1-4799-5405-6
Type :
conf
DOI :
10.1109/DRC.2014.6872413
Filename :
6872413
Link To Document :
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