Title :
A new circuit topology for floating High Voltage level shifters
Author :
Dawei Liu ; Hollis, Simon J. ; Stark, Bernard H.
Author_Institution :
Dept. of Comput. Sci., Univ. of Bristol, Bristol, UK
fDate :
June 30 2014-July 3 2014
Abstract :
A novel and simple circuit topology is presented for high-speed, floating, high voltage level shifters. It uses a current mirror plus latch circuit composed of two inverters. Simulations based on AMS 0.18 μm High Voltage (HV) CMOS Technology show this circuit to combine high speed, low power dissipation, and small layout area. The simulation results show the propagation delay to be below 150 ps for a transition from 1.8 V to 13.8 V.
Keywords :
CMOS logic circuits; current mirrors; flip-flops; AMS high voltage CMOS technology; HV CMOS technology; circuit topology; current mirror plus latch circuit; floating high voltage level shifters; high-speed level shifters; inverters; low power dissipation; propagation delay; size 0.18 mum; small layout area; CMOS integrated circuits; Clamps; Latches; Layout; Mirrors; Rails; Transistors; BCD; HV CMOS; floating; high speed; high voltage; level shifter; low power;
Conference_Titel :
Ph.D. Research in Microelectronics and Electronics (PRIME), 2014 10th Conference on
Conference_Location :
Grenoble
DOI :
10.1109/PRIME.2014.6872653
